1. Field of the Invention
The present invention relates to data communications and more particularly to a data communications system and method which uses error checking, a clock signal line and redundant data signal lines, e.g. three wires, to provide a redundant serial communication path between computing nodes.
2. Description of the Related Art
With multi-node computing systems, such as multi-node servers, becoming more popular, the demand for reliable communications between the nodes is increasing. A typical multi-node system includes a primary node, one or more secondary nodes whose operation is subservient to the primary node, and multiple service processors (or other system management hardware) for controlling the different nodes. The complexities of multi-node computing systems require sophisticated management such that the nodes in the system maintain awareness of the status of the other nodes.
Communication between the nodes is typically accomplished through the use of a predefined networking protocol, such as the Transmission Control Protocol/Internet Protocol (TCP/IP). However, packets using protocols such as TCP/IP add an undesirable latency in connection with the communication between nodes. This can be problematic for multi-node computing systems because the latency in packet delivery can cause a machine check in a node (Node A) when another node (Node B) resets or encounters an error. It is desirable for the operating node (Node A) to have real time data to prevent it from generating a machine check and acting on that unintended error.
A potential solution is to use a dedicated line of communication between the two nodes. Parallel communication links requires too many conductive paths, e.g., wires, which requires bigger connectors, thereby adding cost and consuming a significant portion of node connector area. Serial interfaces, such as Ethernet, Universal Asynchronous Receiver/Transmitter (UART) and Inter-IC (I2C) bus, each have drawbacks that do not lend themselves to solving the above-described problem. For example, Ethernet requires a significant amount of logic (macro-cells) and physical size to implement. Like Ethernet, the use of a UART requires a significant amount of logic (macro-cells) and physical size to implement. This also increases the cost of implementation. Ethernet and UARTs are therefore impractical as solutions. I2C is simple and facilitates low-latency communications, but it does not provide any way to check for, or deal with, errors in the data transmission. As such, error-free packet delivery is not guaranteed.
In addition, Ethernet, UARTs and I2C provide no signal path redundancy. Also, if the link path is noisy, clock recovery can be used for the clock, but not for data. If one wire or signal line fails, communication between the end nodes terminates. It is therefore desirable to have a system and method which minimizes the quantity of communication signal lines between nodes, but still provides a redundant path and guaranteed packet delivery through an error checking process.